holding circuit
英 [ˈhəʊldɪŋ ˈsɜːkɪt]
美 [ˈhoʊldɪŋ ˈsɜːrkɪt]
n. 吸持（保持，自保）电路
双语例句
- Research on a Peak Holding and Data Acquisition Circuit for Nuclear Pulse
一种核脉冲峰值保持和数据获取电路研究 - A Novel Peak Holding Method and Circuit Realization of Laser Narrow Pulse
一种新颖的激光窄脉冲峰值保持方法与电路实现 - The utility model relates to a consciousness restoring comb for auxiliary psychiatric therapy, which consists of a holding handle, a comb body, metal teeth, a circuit board and a display device.
精神科辅助治疗用醒脑梳，由握持手柄、梳体、金属齿、电路板和显示装置组成。 - This paper introduces the methocls of completed the temperature control of aluminum holding furnace by using the remaining resource of PLC and a little outer circuit.
利用控制自动生产系统工艺过程的可编程控制器的富余资源，加上极少的外部电路完成生产系统辅助设备电保温炉的温度控制。 - Sampling rate and holding accuracy are two most concerned targets in designing the sample-and-hold circuit.
采样速度和保持精度，是采样保持电路设计制作者最为关注的两项指标。 - This paper analyzes the characteristic of the analog peak holding-circuit, introduces a digital peak holding circuit based on FPGA and high-speed A/ D converter, and provides its simulation wave in EDA software.
分析了模拟峰值保持器的特点，介绍了一种基于现场可编程逻辑器件FPGA与高速A/D转换器的数字式峰值保持电路，并给出了该电路的峰值采集仿真结果。 - Improvement on holding circuit of passenger compartment door of Shenzhen Metro vehicles
深圳地铁车辆客室车门保持电路的改进 - The operation principles of programmable amplifying circuit, peak sampling, holding circuit and V/ F converting circuit are analysed in detail and program flow graphic is also given.
详细分析了程控放大电路、峰值采样保持电路、V／F转换电路的工作原理，并给出了程序流程图。 - Design of High-Speed Digital Peak Holding Circuit Based on FPGA
基于FPGA的高速数字峰值保持器设计 - An Investigation on the Sampling-Holding Circuit With Symmetric Switching Capacitor
浅议化蛹抽查法对称开关电容采样保持电路的研究 - A Sampling-holding/ Subtract-gain Circuit for Analog to Digital Converter
一种模数转换器的采样保持/增益减法电路设计 - A small shaping amplifier and peak holding circuit
一种小型成形放大与峰保持电路 - Based on the false alarm control theory and the characteristic of the chip microcomputer's convenience to treating and holding digital information, a numeric control bias circuit auto-tracing the avalanche breakdown voltage is designed.
基于偏压的虚警控制原理，利用单片机便于数据处理和存储的特点，设计了一个自动跟踪雪崩管击穿电压的数控偏压电路。 - An Unlimited Sampling-Holding and Auto-Nulling Circuit
无限采样保持和自动清零电路 - The design of a fully differential CMOS sampling holding circuit and inter stage subtract gain circuit used in 10 bit 30 M sample/ s pipelined ADC is presented in this paper.
介绍一种10位分辨率、30MHz采样频率流水线操作A/D变换器中的CMOS全差分采样-保持（S/H）电路和级间减法-增益（SUB/GAIN）电路的设计。 - A Pipelined AD Converter Based on Fully Differentiating Dual-tunnel Sampling/ Holding Circuit
一种全差分双通道采样保持的流水线操作AD变换器 - Therefore the data acquisition system includes mainly a multiple channel switch, a peak value holding circuit, a high speed A/ D converter, a frame memory, an address generator, a sequence and logic control circuit.
所以本系统主要包括多通道开关、峰值保持、高速A/D、帧存储器、内地址发生器和时序及逻辑控制等几部分。 - A new type read out circuit is composed with one dynamic source follower, one capacitance for sampling and holding and one reset switch. This circuit has advantages with simple structure, acquiring related timing easily, single output, and so on.
采用一种新型结构的读出电路，该电路包含一个动态源随器和一个采样保持电容和一个复位开关，结构简单，时序容易实现，并且是单端输出，有着诸多优点。 - Typical sub-blocks were analysed emphatically such as Switch Capacitor Sampling/ Holding Block, Brightness Control Block, Oscillator, Thermal Shut Down Circuit, PTAT and Bandgap Reference etc.
重点分析了典型子电路模块：开关电容采样保持电路、亮度控制电路、振荡器、过温保护电路、PTAT和带隙基准电路等。 - Peak-to-peak value holding circuit of AES
俄歇能谱仪用峰峰值保持电路 - Hardware circuits include discriminator circuit 、 peak holding circuit 、 control circuit 、 analog-digital conversion circuit and communication circuit.
硬件电路包括甄别电路、峰值保持电路、控制电路、模数转换电路、通信电路。